1. Field of the Invention
This invention relates to operational amplifiers and more specifically to a gain-integrator stage utilizing operational amplifiers wherein the effects of the inherent offset voltages of the operational amplifiers contained within the circuit are eliminated. Offset voltages from other causes, including parasitic capacitances, switch operation, and leakage currents, are also eliminated.
2. Description of the Prior Art
The use of operational amplifiers to form gain-integrator stages is well-known. A schematic diagram of one such prior art circuit is shown in FIG. 1. Operational amplifier 115 receives input voltage V.sub.in from input terminal 111 through a switched capacitor means comprised of switches 112 and 113, and capacitor 114. The use of switched capacitors in this manner is well-known in the prior art. See, for example, an article entitled "Analog Sample Data Filters", IEEE Journal of Solid-Stage Circuits, August 1972, Pg. 302. The closed loop gain (G.sub.1) of operational amplifier 115 is equal to the negative of the ratio of the capacitance of capacitor 114 to the capacitance of capacitor 116, as is well-known. In a similar manner the closed loop gain (G.sub.2) of operational amplifier 120 is equal to the negative of the ratio of the capacitance of capacitor 119 to the capacitance of capacitor 121. The overall gain of the circuit of FIG. 1 is equal to the product G.sub.1 G.sub.2.
The use of capacitors to determine the closed loop gain of an operational amplifier is particularly useful when metal oxide semiconductor (MOS) devices are used as the active elements in the operational amplifier because resistance values, and thus the closed loop gain of an operational amplifier utilizing MOS resistors as the gain determining components, are not highly controllable. In contrast, capacitance values are determined by the plate size and the dielectric thickness. Capacitor plate sizes are highly controllable in MOS devices, and dielectric thickness is quite uniform across an MOS device. Thus, capacitance ratios, and therefore the closed loop gain of an operational amplifier using capacitors as shown in FIG. 1, are quite controllable in MOS devices.
As is well-known, component mismatches during the fabrication of operational amplifiers using integrated circuit technology result in an inherent offset voltage V.sub.off unique to each operational amplifier. This offset voltage is defined as the voltage V.sub.out appearing on the output lead of the operational amplifier when the amplifier is in the unity gain mode (inverting input lead and output lead connected) and its noninverting input lead grounded. Thus, the actual output voltage V.sub.out of operational amplifier 115 available at node 150 is given in Equation (1): EQU V.sub.out1 =G.sub.1 V.sub.in +V.sub.off1 ( 1)
Similarly, the output voltage of operational amplifier 120, available at node 151, is given by Equation (2): EQU V.sub.out =G.sub.2 V.sub.out1 +V.sub.off2 ( 2)
Thus, the output voltage at node 151, expressed as a function of the input voltage V.sub.in, is shown in Equation (3): EQU V.sub.out =G.sub.1 G.sub.2 V.sub.in +G.sub.2 V.sub.off1 +V.sub.off2 ( 3)
Thus, the error component of the output voltage available at nod 151 is: EQU V.sub.error =G.sub.2 V.sub.off1 +V.sub.off2 ( 4)
where
V.sub.out1 =the output voltage of operational amplifier 115 available at node 150; PA1 V.sub.out =the output voltage of operational amplifier 120 available at node 151; PA1 G.sub.1 =the closed loop gain of operational amplifier 115; PA1 G.sub.2 =the closed loop gain of operational amplifier 120; PA1 V.sub.off1 =the inherent offset voltage of operational amplifier 115; PA1 V.sub.off2 =the inherent offset voltage of operational amplifier 120; and PA1 V.sub.error =the error component of V.sub.out.
The presence of inherent offset voltage V.sub.off1 and V.sub.off2 reduces the dynamic range of the gain-integrator stage of FIG. 1 because the output voltages of operational amplifiers 115 and 120 will saturate at a lower input voltage differential than ideal operational amplifiers free from inherent offset voltages. One prior art method of minimizing the effect of the error component, V.sub.error, is the use of DC blocking capacitor 122 between node 151 and output terminal 123. DC blocking capacitor 122 blocks the DC error component V.sub.error. However, the use of DC blocking capacitor 122 is undesirable because it must be rather large, on the order of approximately 0.1 microfarad, thus resulting in increased cost and the need for an off-chip component if the gain integrator stage is to be formed as an integrated circuit. Furthermoe, DC blocking capacitor 122 effectively blocks all DC components of the output voltage, not just the DC components attributable to offset voltages. Thus, desired DC components of the output voltage are also blocked by DC blocking capacitor 122.